ISA Bus Based Add-on Card for Real-Time Avionics Simulation

Supplier : Apollo Computing Laboratories (P) Ltd.

Key Features of ISA Bus Based Add-on Card for Real-Time Avionics Simulation
  • Up to three independent dual redundant BC/RT/MT Channels, based on ILC-DDC BU-61580 or BU-61588 Mini-ACE on one PC-AT/386/486/Pentium system free PCI slot.
  • Supports full MIL-STD-1553B Notice -2
  • Supports all 1553B message formats and mode-codes
  • On board time-tag counter
  • Software programmable RT Command illegalization logic
  • RT Sub-address circular buffers to support bulk data transfers
  • Optional separation of RT broadcast data
  • Each channel supports double buffered dual ported 32K X 16 bit memory for preparation and transfer
  • Programmable RT address
  • High performance
  • Novel Transmitter Shut-down feature in BC mode.
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Product Profile of ISA Bus Based Add-on Card for Real-Time Avionics Simulation
Apollo Computing Laboratories [P] Ltd supplies ISA Bus Based Add-on Card for Real-Time Avionics Simulation. Apollo Computing Laboratories [P] Ltd offers different types of add-on card and accessories. ISA Bus Based Add-on Card for Real-Time Avionics Simulation is suitable for defense and aerospace sectors. ISA Bus Based Add-on Card for Real-Time Avionics Simulation is available with on-board double buffered dual port memory which facilitates parallel message preparation and transfers, increasing the effective throughput. The module is supported by a user friendly, menu driven, configurable software package under Windows-NT environment, with higher level functions like data formatting, logging, display etc.

Key Features of ISA Bus Based Add-on Card for Real-Time Avionics Simulation
  • Up to three independent dual redundant BC/RT/MT Channels, based on ILC-DDC BU-61580 or BU-61588 Mini-ACE on one PC-AT/386/486/Pentium system free PCI slot.
  • Supports full MIL-STD-1553B Notice -2
  • Supports all 1553B message formats and mode-codes
  • On board time-tag counter
  • Software programmable RT Command illegalization logic
  • RT Sub-address circular buffers to support bulk data transfers
  • Optional separation of RT broadcast data
  • Each channel supports double buffered dual ported 32K X 16 bit memory for preparation and transfer
  • Programmable RT address
  • High performance
  • Novel Transmitter Shut-down feature in BC mode.